搜索资源列表
SRAM
- FPGA控制ＳＲＡＭ61LV25616 vhdl源程序．
FPGA读写控制sram
- 拨码开关控制读写，按键控制地址加，读出数据由数码管显示，直观展现了程序是否正确。
一种流水线控制结构处理器的实现
- A fast control cell processor (CCP) has been designed and implemented in order to process control cells as they enter the module. This fast CCP is capable of receiving back-to-back control cells, process- ing them, and sending them out in back-to-b
C51控制SRAM
- 本源码是模拟软核51利用I2c控制SRAM进行读写控制的程序
用FPGA实现SRAM读写控制的Verilog代码
- 用FPGA实现SRAM读写控制的Verilog代码-SRAM FPGA implementation using Verilog code to read and write control
SRAM
- stm32f103zet6,通过stm32的fsmc来对sram的控制，实现数据读写-stm32f103zet6, through stm32 of fsmc to the control of sram, read and write data
FIFO
- verilog编写的读写fifo的源码，包括sram的读写控制-verilog source code written to read and write fifo, including the sram to read and write control
sram
- SRAM控制器，含整个工程 vSRAM控制器，含整个工程 SRAM控制器，含整个工程-SRAM SRAMSRAMSRAMSRAMSRAMSRAMSRAMSRAM
Verilog-SRAM
- 用verilog hdl语言编写的fpga与片外sram 的读写控制-With the verilog hdl language fpga sram chip with read and write control
SRAM_Controller
- SRAM controller用于控制sram -SRAM controller
sram
- 用FPGA 控制sram读写程序的小程序，-fpga control precedure
fpga_sram
- Altera cyclone ep1c6对sram idt71系列的读写时序控制-Altera cyclone ep1c6 of sram idt71 series of read and write timing control
C20_sram_vga
- FPGA应用如sd卡控制，led控制，vga音频控制-Sd card FPGA applications such as control, led control, vga audio control
sram216
- SRAM IS61LVC12824,读写控制程序，用CPLD 95216设计-SRAM IS61LVC12824, read and write control procedures, with the design of CPLD 95216
sram
- 对常用的sram完成读写控制，可以根据具体地址增加参数，非常灵活-Commonly used to read and write sram to complete control, can be increased in accordance with the specific parameters of address, a very flexible
SRAM_Controller
- Altera University Program的Avalon总线IP核，SRAM控制代码，可以解压后直接挂载在Avalon总线上 -Altera University Program of the Avalon bus IP core, SRAM control code can be directly mounted after decompression in the Avalon bus
keylcdpwm-sram
- 利用DSP 2812,通过键盘控制液晶12864的显示.-The use of DSP 2812, through the keyboard control the liquid crystal display 12864.
yuyincaiji
- 语音采集与回放系统源代码：1.为了使读音数据存储的时间更长，速度更快，选用了256K*16Bit的SRAM；2.为了减少单片机的控制复杂度，使用了FPGA来控制SRAM的读写操作，节约了不少单片机的I/O资源；3.为了以后的高速数据存储，本设计中加入了fifo,其位宽及深度可在程序中自由设置，方便灵活。-Speech acquisition and playback system source code: 1. In order to make pronunciation longer data
SRAM
- FPGA控制SRAM的VERILOG源码-The VERILOG source code control SRAM FPGA
FPGA控制SRAM的读写
- FPGA控制SRAM的读写，通过测试！！！！！！！！！！！！！！！！(FPGA controls the reading and writing of SRAM)